| 000 | 03038nam a22004815i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4614-8881-1 | ||
| 003 | DE-He213 | ||
| 005 | 20140220082503.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 131022s2014 xxu| s |||| 0|eng d | ||
| 020 |
_a9781461488811 _9978-1-4614-8881-1 |
||
| 024 | 7 |
_a10.1007/978-1-4614-8881-1 _2doi |
|
| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aMohammad, Baker. _eauthor. |
|
| 245 | 1 | 0 |
_aEmbedded Memory Design for Multi-Core and Systems on Chip _h[electronic resource] / _cby Baker Mohammad. |
| 264 | 1 |
_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2014. |
|
| 300 |
_aXIII, 95 p. 63 illus., 37 illus. in color. _bonline resource. |
||
| 336 |
_atext _btxt _2rdacontent |
||
| 337 |
_acomputer _bc _2rdamedia |
||
| 338 |
_aonline resource _bcr _2rdacarrier |
||
| 347 |
_atext file _bPDF _2rda |
||
| 490 | 1 |
_aAnalog Circuits and Signal Processing, _x1872-082X ; _v116 |
|
| 505 | 0 | _aIntroduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges. | |
| 520 | _aThis book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory. · Provides a comprehensive overview of embedded memory design and associated challenges and choices; · Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; · Includes detailed discussion of memory hierarchy and its impact on energy and performance; · Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis. | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aComputer science. | |
| 650 | 0 | _aElectronics. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | _aProcessor Architectures. |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9781461488804 |
| 830 | 0 |
_aAnalog Circuits and Signal Processing, _x1872-082X ; _v116 |
|
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-8881-1 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c92269 _d92269 |
||