000 01378nam a22003975i 4500
001 978-3-642-19568-6
003 DE-He213
005 20130515022152.0
007 cr nn 008mamaa
008 110816s2011 gw | s |||| 0|eng d
020 _a9783642195686
_9978-3-642-19568-6
024 7 _a10.1007/978-3-642-19568-6
_2doi
050 4 _aTK7800-8360
050 4 _aTK7874-7874.9
072 7 _aTJF
_2bicssc
072 7 _aTEC008000
_2bisacsh
082 0 4 _a621.381
_223
100 1 _aIshibashi, Koichiro.
245 1 0 _aLow Power and Reliable SRAM Memory Cell and Array Design
_h[electronic resource] /
_cedited by Koichiro Ishibashi, Kenichi Osada.
260 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg,
_c2011.
300 _bdigital.
490 0 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v31
650 0 _aEngineering.
650 0 _aElectronics.
650 1 4 _aEngineering.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
650 2 4 _aEngineering, general.
700 1 _aOsada, Kenichi.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783642195679
830 0 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v31
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-642-19568-6
912 _aZDB-2-ENG
999 _c84805
_d84805