| 000 | 01803nam a22004935i 4500 | ||
|---|---|---|---|
| 001 | 978-3-642-11802-9 | ||
| 003 | DE-He213 | ||
| 005 | 20130515022014.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100305s2010 gw | s |||| 0|eng d | ||
| 020 |
_a9783642118029 _9978-3-642-11802-9 |
||
| 024 | 7 |
_a10.1007/978-3-642-11802-9 _2doi |
|
| 050 | 4 | _aTK7895.M5 | |
| 072 | 7 |
_aUYF _2bicssc |
|
| 072 | 7 |
_aCOM011000 _2bisacsh |
|
| 082 | 0 | 4 |
_a004.1 _223 |
| 100 | 1 | _aMonteiro, José. | |
| 245 | 1 | 0 |
_aIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation _h[electronic resource] : _b19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers / _cedited by José Monteiro, René Leuken. |
| 260 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2010. |
||
| 300 | _bdigital. | ||
| 490 | 0 |
_aLecture Notes in Computer Science, _x0302-9743 ; _v5953 |
|
| 650 | 0 | _aComputer science. | |
| 650 | 0 | _aComputer hardware. | |
| 650 | 0 | _aMicroprogramming. | |
| 650 | 0 | _aMemory management (Computer science). | |
| 650 | 0 | _aLogic design. | |
| 650 | 0 | _aComputer simulation. | |
| 650 | 1 | 4 | _aComputer Science. |
| 650 | 2 | 4 | _aProcessor Architectures. |
| 650 | 2 | 4 | _aSimulation and Modeling. |
| 650 | 2 | 4 | _aComputer Hardware. |
| 650 | 2 | 4 | _aControl Structures and Microprogramming. |
| 650 | 2 | 4 | _aMemory Structures. |
| 650 | 2 | 4 | _aLogic Design. |
| 700 | 1 | _aLeuken, René. | |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9783642118012 |
| 830 | 0 |
_aLecture Notes in Computer Science, _x0302-9743 ; _v5953 |
|
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-642-11802-9 |
| 912 | _aZDB-2-SCS | ||
| 912 | _aZDB-2-LNC | ||
| 999 |
_c83101 _d83101 |
||