000			01408nam a22004215i 4500
001			978-1-4020-4822-7
003			DE-He213
005			20130515020756.0
007			cr nn 008mamaa
008			100301s2006 ne | s |||| 0|eng d
020			_a9781402048227 _9978-1-4020-4822-7
024	7		_a10.1007/1-4020-4822-X _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aWehmeyer, Lars.
245	1	0	_aFast, Efficient and Predictable Memory Accesses _h[electronic resource] : _bOptimization Algorithms for Memory Architecture Aware Compilation / _cby Lars Wehmeyer, Peter Marwedel.
260			_aDordrecht : _bSpringer Netherlands, _c2006.
300			_bdigital.
650		0	_aEngineering.
650		0	_aComputer science.
650		0	_aElectronics.
650		0	_aSystems engineering.
650		0	_aOptical materials.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aProcessor Architectures.
650	2	4	_aOptical and Electronic Materials.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
700	1		_aMarwedel, Peter.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781402048210
856	4	0	_uhttp://dx.doi.org/10.1007/1-4020-4822-X
912			_aZDB-2-ENG
999			_c69996 _d69996