000 01268nam a22003975i 4500
001 978-0-387-29906-8
003 DE-He213
005 20130515020436.0
007 cr nn 008mamaa
008 100301s2006 xxu| s |||| 0|eng d
020 _a9780387299068
_9978-0-387-29906-8
024 7 _a10.1007/0-387-29906-8
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aBertacco, Valeria.
245 1 0 _aScalable Hardware Verification with Symbolic Simulation
_h[electronic resource] /
_cby Valeria Bertacco.
260 _aBoston, MA :
_bSpringer US,
_c2006.
300 _bdigital.
650 0 _aEngineering.
650 0 _aComputer hardware.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
650 2 4 _aComputer Hardware.
650 2 4 _aElectronic and Computer Engineering.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387244112
856 4 0 _uhttp://dx.doi.org/10.1007/0-387-29906-8
912 _aZDB-2-ENG
999 _c66481
_d66481