000 01040nam a22003135i 4500
001 978-0-387-09671-1
003 DE-He213
005 20130515020349.0
007 cr nn 008mamaa
008 110401s2009 xxu| s |||| 0|eng d
020 _a9780387096711
_9978-0-387-09671-1
024 7 _a10.1007/978-0-387-09671-1
_2doi
100 1 _aCardoso, João M.P.
245 1 0 _aCompilation Techniques for Reconfigurable Architectures
_h[electronic resource] /
_cby João M.P. Cardoso, Pedro C. Diniz.
260 _aBoston, MA :
_bSpringer US,
_c2009.
300 _bdigital.
650 0 _aComputer science.
650 0 _aComputer engineering.
650 1 4 _aComputer Science.
650 2 4 _aProcessor Architectures.
650 2 4 _aElectrical Engineering.
700 1 _aDiniz, Pedro C.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9780387096704
856 4 0 _uhttp://dx.doi.org/10.1007/978-0-387-09671-1
912 _aZDB-2-SCS
999 _c65588
_d65588