| 000 | 03437nam a22004575i 4500 | ||
|---|---|---|---|
| 001 | 978-90-481-3280-5 | ||
| 003 | DE-He213 | ||
| 005 | 20140220084557.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100301s2010 ne | s |||| 0|eng d | ||
| 020 |
_a9789048132805 _9978-90-481-3280-5 |
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| 024 | 7 |
_a10.1007/978-90-481-3280-5 _2doi |
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| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
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| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aFulde, Michael. _eauthor. |
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| 245 | 1 | 0 |
_aVariation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies _h[electronic resource] / _cby Michael Fulde. |
| 264 | 1 |
_aDordrecht : _bSpringer Netherlands, _c2010. |
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| 300 |
_aX, 127p. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 490 | 1 |
_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v28 |
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| 505 | 0 | _aAnalog Properties of Multi-Gate MOSFETs -- High-k Related Design Issues -- Multi-Gate Related Design Aspects -- Multi-Gate Tunneling FETs -- Conclusions and Outlook. | |
| 520 | _aSince scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies. Closing the gap from technology to design a detailed insight into circuit performance trade-offs related to multi-gate and high-k device specifics is provided. The new effect of transient threshold voltage variations is described with an equivalent model that allows a systematic assessment of the consequences on circuit level and the development of countermeasures to compensate for performance degradation in comparators and A/D converters. Key analog, mixed-signal and RF building blocks are realized in high-k multi-gate technology and benchmarked against planar bulk. Performance and area benefits, enabled by advantageous multi-gate device properties are analytically and experimentally quantified for reference circuits, operational amplifiers and D/A converters. This is based on first time silicon investigations of complex mixed-signal building blocks as D/A converter and PLL with multi-gate devices. As another first, the integration of tunnel transistors in a multi-gate process is described, enabling devices with promising scaling and analog properties. Based on these devices a novel reference circuit is proposed which features low power consumption. | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 0 | _aOptical materials. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aOptical and Electronic Materials. |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9789048132799 |
| 830 | 0 |
_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v28 |
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| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-90-481-3280-5 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c113307 _d113307 |
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