000 02991nam a22004815i 4500
001 978-3-642-12346-7
003 DE-He213
005 20140220084534.0
007 cr nn 008mamaa
008 100413s2010 gw | s |||| 0|eng d
020 _a9783642123467
_9978-3-642-12346-7
024 7 _a10.1007/978-3-642-12346-7
_2doi
050 4 _aQ342
072 7 _aUYQ
_2bicssc
072 7 _aCOM004000
_2bisacsh
082 0 4 _a006.3
_223
100 1 _aBarros, Manuel F. M.
_eauthor.
245 1 0 _aAnalog Circuits and Systems Optimization based on Evolutionary Computation Techniques
_h[electronic resource] /
_cby Manuel F. M. Barros, Jorge M. C. Guilherme, Nuno C. G. Horta.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg,
_c2010.
300 _a240p. 141 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aStudies in Computational Intelligence,
_x1860-949X ;
_v294
505 0 _aState-of-the-Art on Analog Design Automation -- Evolutionary Analog IC Design Optimization -- Enhanced Techniques for Analog Circuits Design Using SVM Models -- Analog IC Design Environment Architecture -- Optimization of Analog Circuits and Systems - Applications -- Conclusions.
520 _aThe microelectronics market trends present an ever-increasing level of complexity with special emphasis on the production of complex mixed-signal systems-on-chip. Strict economic and design pressures have driven the development of new methods to automate the analog design process. However, and despite some significant research efforts, the essential act of design at the transistor level is still performed by the trial and error interaction between the designer and the simulator. This book presents a new design automation methodology based on a modified genetic algorithm kernel, in order to improve efficiency on the analog IC design cycle. The proposed approach combines a robust optimization with corner analysis, machine learning techniques and distributed processing capability able to deal with multi-objective and constrained optimization problems. The resulting optimization tool and the improvement in design productivity is demonstrated for the design of CMOS operational amplifiers.
650 0 _aEngineering.
650 0 _aElectronics.
650 1 4 _aEngineering.
650 2 4 _aComputational Intelligence.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
650 2 4 _aRobotics and Automation.
700 1 _aGuilherme, Jorge M. C.
_eauthor.
700 1 _aHorta, Nuno C. G.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783642123450
830 0 _aStudies in Computational Intelligence,
_x1860-949X ;
_v294
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-642-12346-7
912 _aZDB-2-ENG
999 _c112054
_d112054