000 03868nam a22005415i 4500
001 978-3-642-12267-5
003 DE-He213
005 20140220084534.0
007 cr nn 008mamaa
008 100408s2010 gw | s |||| 0|eng d
020 _a9783642122675
_9978-3-642-12267-5
024 7 _a10.1007/978-3-642-12267-5
_2doi
050 4 _aQA76.635
072 7 _aUMB
_2bicssc
072 7 _aCOM067000
_2bisacsh
072 7 _aCOM041000
_2bisacsh
082 0 4 _a005.18
_223
100 1 _aPiguet, Christian.
_eeditor.
245 1 0 _aVLSI-SoC: Design Methodologies for SoC and SiP
_h[electronic resource] :
_b16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers /
_cedited by Christian Piguet, Ricardo Reis, Dimitrios Soudris.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg,
_c2010.
300 _aVIII, 287p. 182 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aIFIP Advances in Information and Communication Technology,
_x1868-4238 ;
_v313
505 0 _aPhysical Design Issues in 3-D Integrated Technologies -- Universal Methodology to Handle Differential Pairs during Pin Assignment -- Analysis and Design of Charge Pumps for Telecommunication Applications -- Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging Systems -- Trapping Biological Species in a Lab-on-Chip Microsystem: Micro Inductor Optimization Design and SU8 Process -- Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs -- Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case Study -- Real-Time Biologically-Inspired Image Exposure Correction -- A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters -- On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters -- Time Efficient Dual-Field Unit for Cryptography-Related Processing -- A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs -- A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication -- Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems -- Timing Error Detection and Correction by Time Dilation.
520 _aThis book contains extended and revised versions of the best papers presented at the 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, held in Rhodes Island, Greece, in October 2008. The 14 papers presented together with an invited contribution were carefully selected from 56 papers. The papers cover a wide variety of excellence in VLSI technology and advanced research in the fields of VLSI/ULSI systems, embedded systems, and microelectronic design and test.
650 0 _aComputer science.
650 0 _aMicroprogramming.
650 0 _aSoftware engineering.
650 0 _aCoding theory.
650 0 _aComputer software.
650 1 4 _aComputer Science.
650 2 4 _aControl Structures and Microprogramming.
650 2 4 _aSoftware Engineering/Programming and Operating Systems.
650 2 4 _aCoding and Information Theory.
650 2 4 _aAlgorithm Analysis and Problem Complexity.
700 1 _aReis, Ricardo.
_eeditor.
700 1 _aSoudris, Dimitrios.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783642122668
830 0 _aIFIP Advances in Information and Communication Technology,
_x1868-4238 ;
_v313
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-642-12267-5
912 _aZDB-2-SCS
999 _c112038
_d112038