| 000 | 03969nam a22004455i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4419-6175-4 | ||
| 003 | DE-He213 | ||
| 005 | 20140220084509.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 130531s2010 xxu| s |||| 0|eng d | ||
| 020 |
_a9781441961754 _9978-1-4419-6175-4 |
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| 024 | 7 |
_a10.1007/978-1-4419-6175-4 _2doi |
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| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aLeupers, Rainer. _eeditor. |
|
| 245 | 1 | 0 |
_aProcessor and System-on-Chip Simulation _h[electronic resource] / _cedited by Rainer Leupers, Olivier Temam. |
| 264 | 1 |
_aBoston, MA : _bSpringer US : _bImprint: Springer, _c2010. |
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| 300 |
_aXIII, 345p. 100 illus. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 505 | 0 | _aSystem Simulation and Exploration -- The Life Cycle of a Virtual Platform -- Full-System Simulation from Embedded to High-Performance Systems -- Toward the Datacenter: Scaling Simulation Up and Out -- Modular ISA-Independent Full-System Simulation -- Structural Simulation for Architecture Exploration -- Fast Simulation -- Accelerating Simulation with FPGAs -- Scalable Simulation for MPSoC Software and Architectures -- Adaptive High-Speed Processor Simulation -- Representative Sampling Using SimPoint -- Statistical Sampling -- Efficient Cache Modeling with Sparse Data -- Statistical Simulation -- Impact of Silicon Technology -- Memory Modeling with CACTI -- Thermal Modeling for Processors and Systems-on-Chip -- Rapid Technology-Aware Design Space Exploration for Embedded Heterogeneous Multiprocessors -- Embedded Systems Simulation -- IP Modeling and Verification -- Configurable, Extensible Processor System Simulation -- Simulation Acceleration in Wireless Baseband Processing -- Trace-Driven Workload Simulation for MPSoC Software Performance Estimation. | |
| 520 | _aProcessor and System-on-Chip Simulation Edited by: Rainer Leupers Olivier Temam The current trend from monolithic processors to multicore and multiprocessor systems on chips (MPSoC) with tens of cores and gigascale integration makes hardware architecture and software design more and more complex and costly. Therefore, simulation technology has become an extremely important pre-silicon verification and optimization vehicle. Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization, as well as functional and timing verification. Recent, innovative technologies, such as retargetable simulator generation, dynamic binary translation and sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. This book presents and discusses the principle technologies and state-of-the-art in high-level architecture software simulation, both at the processor and the system-on-chip level. • Presents state-of-the-art and future trends in processor and SoC simulation; • Demonstrates how simulation helps to boost hardware and software design productivity; • Addresses simulation requirements and technologies in the multicore context; • Covers system aspects, such as virtual platforms, bus simulation, caches, power, and design space exploration. | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aComputer aided design. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
| 700 | 1 |
_aTemam, Olivier. _eeditor. |
|
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9781441961747 |
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4419-6175-4 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c110590 _d110590 |
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