000			03463nam a22004935i 4500
001			978-1-4419-0938-1
003			DE-He213
005			20140220084503.0
007			cr nn 008mamaa
008			100301s2010 xxu| s |||| 0|eng d
020			_a9781441909381 _9978-1-4419-0938-1
024	7		_a10.1007/978-1-4419-0938-1 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aBosio, Alberto. _eauthor.
245	1	0	_aAdvanced Test Methods for SRAMs _h[electronic resource] : _bEffective Solutions for Dynamic Fault Detection in Nanoscaled Technologies / _cby Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel.
250			_a1.
264		1	_aBoston, MA : _bSpringer US, _c2010.
300			_bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aBasics on SRAM Testing -- Resistive-Open Defects in Core-Cells -- Resistive-Open Defects in Pre-charge Circuits -- Resistive-Open Defects in Address Decoders -- Resistive-Open Defects in Write Drivers -- Resistive-Open Defects in Sense Amplifiers -- Faults Due to Process Variations in SRAMs -- Diagnosis and Design-for-Diagnosis.
520			_aAdvanced Test Methods for SRAMs: Effective Solutions for Dynamic Fault Detection in Nanoscaled Technologies by: Alberto Bosio Luigi Dilillo Patrick Girard Serge Pravossoudovitch Arnaud Virazel Modern electronics depends on nanoscaled technologies that present new challenges in terms of testing and diagnosis. Memories are particularly prone to defects since they exploit the technology limits to get the highest density. This book is an invaluable guide to the testing and diagnosis of the latest generation of SRAM, one of the most widely used type of memories. Classical methods for testing memory are designed to handle the so-called "static faults", but these test solutions are not sufficient for faults that are emerging in the latest Very Deep Sub-Micron (VDSM) technologies. These new faults, referred to as "dynamic faults", are not covered by classical algorithms and require the dedicated test and diagnosis solutions presented in this book. First book to present complete, state-of-the-art coverage of dynamic fault testing for SRAM memories; Presents content using a "bottom-up" approach, from the study of the electrical causes of malfunctions up to the generation of smart test strategies; Includes case studies covering all memory components (core-cells, address decoders, write drivers, sense amplifiers, etc.); Proposes an exhaustive analysis of resistive-open defects in each memory component and the resulting dynamic fault modeling.
650		0	_aEngineering.
650		0	_aComputer aided design.
650		0	_aSystems engineering.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aComputer-Aided Engineering (CAD, CAE) and Design.
700	1		_aDilillo, Luigi. _eauthor.
700	1		_aGirard, Patrick. _eauthor.
700	1		_aPravossoudovitch, Serge. _eauthor.
700	1		_aVirazel, Arnaud. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781441909374
856	4	0	_uhttp://dx.doi.org/10.1007/978-1-4419-0938-1
912			_aZDB-2-ENG
999			_c110279 _d110279