| 000 | 03418nam a22004455i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4614-0061-5 | ||
| 003 | DE-He213 | ||
| 005 | 20140220083731.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 110810s2011 xxu| s |||| 0|eng d | ||
| 020 |
_a9781461400615 _9978-1-4614-0061-5 |
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| 024 | 7 |
_a10.1007/978-1-4614-0061-5 _2doi |
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| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
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| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aCardoso, João M. P. _eeditor. |
|
| 245 | 1 | 0 |
_aReconfigurable Computing _h[electronic resource] : _bFrom FPGAs to Hardware/Software Codesign / _cedited by João M. P. Cardoso, Michael Hübner. |
| 264 | 1 |
_aNew York, NY : _bSpringer New York, _c2011. |
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| 300 |
_aXV, 296p. 107 illus. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 505 | 0 | _aIntroduction -- The Relevance of Reconfigurable Computing -- HiPEAC: Upcoming Challenges in Reconfigurable Computing -- MORPHEUS: Exploitation of Reconfiguration for Increased Run-time Flexibility and Self-adaptive Capabilities in Future SoCs -- hArtes: Holistic Approach to Reconfigurable Real-time Embedded Systems -- Smart Chips for Smart Surroundings -- AETHER: Self-adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies -- ANDRES: Analysis and Design of Run-time Reconfigurable, Heterogeneous Systems -- CRISP: Cutting Edge Reconfigurable ICs for Stream Processing -- ERA: Embedded Reconfigurable Architectures -- REFLECT: Rendering FGGAs to Multi-core Embedded Computing -- Conclusion. | |
| 520 | _aAs the complexity of modern embedded systems increases, it becomes less practical to design monolithic processing platforms. As a result, reconfigurable computing is being adopted widely for more flexible design. Reconfigurable Computers offer the spatial parallelism and fine-grained customizability of application-specific circuits with the postfabrication programmability of software. To make the most of this unique combination of performance and flexibility, designers need to be aware of both hardware and software issues. FPGA users must think not only about the gates needed to perform a computation but also about the software flow that supports the design process. The goal of this book is to help designers become comfortable with these issues, and thus be able to exploit the vast opportunities possible with reconfigurable logic. Focuses on both hardware and software systems Treats FPGAs as computing vehicles rather than glue-logic or ASIC substitutes Assembles broad set of models for exploiting FPGA parallelism Demonstrates how to use and manage reconfiguration Provides broad set of case studies demonstrating how to use FPGAs in novel and efficient ways | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aComputer aided design. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aComputer-Aided Engineering (CAD, CAE) and Design. |
| 700 | 1 |
_aHübner, Michael. _eeditor. |
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| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9781461400608 |
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-0061-5 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c106197 _d106197 |
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