000 03322nam a22004335i 4500
001 978-1-4419-9296-3
003 DE-He213
005 20140220083728.0
007 cr nn 008mamaa
008 110503s2011 xxu| s |||| 0|eng d
020 _a9781441992963
_9978-1-4419-9296-3
024 7 _a10.1007/978-1-4419-9296-3
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aChuriwala, Sanjay.
_eauthor.
245 1 0 _aPrinciples of VLSI RTL Design
_h[electronic resource] :
_bA Practical Guide /
_cby Sanjay Churiwala, Sapan Garg.
264 1 _aNew York, NY :
_bSpringer New York,
_c2011.
300 _aXIV, 206p. 95 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
520 _a� In the process of integrated circuit design, front-end activities start with a register transfer level (RTL) description, of the functionality desired from the IC.� During subsequent steps in the design flow, issues may arise related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc. which are a function of the way the RTL was originally written. As a result, RTL designers need to take care of many aspects which can have impact on later steps in the design process. Since RTL design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains those various aspects, their significance, what caution needs to be taken during RTL design and why.� Readers will benefit from a highly practical approach to the fundamentals of uncertainties around functionality, clock domain crossing and clock synchronization, design for test and testability, power consumption, static timing analysis, timing exception handling, and routing congestion. Hopefully, this book will find its place in the hearts and minds of anyone who generates RTL code. This includes RTL designers as well as those writing tools that generate RTL. Relatively new RTL designers will find this book to be a single-source of interesting, rich and useful knowledge.� Experienced RTL designers will be able to appreciate and cement some already known concepts, given the focus on practical situations encountered in real designs. � * Provides a highly accessible, single-source reference to all key topics essential to an RTL designer; * Describes in detail specific actions/cautions that designer needs to consider in design to avoid problems in downstream implementation; * Covers content based on practical experience with numerous real designs from large semiconductor design companies. � �
650 0 _aEngineering.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
700 1 _aGarg, Sapan.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781441992956
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4419-9296-3
912 _aZDB-2-ENG
999 _c106020
_d106020