000 02990nam a22004575i 4500
001 978-1-4419-6911-8
003 DE-He213
005 20140220083721.0
007 cr nn 008mamaa
008 100927s2011 xxu| s |||| 0|eng d
020 _a9781441969118
_9978-1-4419-6911-8
024 7 _a10.1007/978-1-4419-6911-8
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aSilvano, Cristina.
_eeditor.
245 1 0 _aLow Power Networks-on-Chip
_h[electronic resource] /
_cedited by Cristina Silvano, Marcello Lajolo, Gianluca Palermo.
264 1 _aBoston, MA :
_bSpringer US :
_bImprint: Springer,
_c2011.
300 _aX, 300p. 100 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aNetwork-on-Chip Power Estimation -- Timing -- synchronous/asynchronous communication -- Network-on-Chip link design -- Topology exploration -- Network-on-Chip support for CMP/MPSoCs -- Network design for 3D stacked logic and memory -- Beyond the wired Network-on-Chip.
520 _aLow Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities, since power and energy issues still represent one of the limiting factors in integrating multi- and many-cores on a single chip. This book covers power and energy aware design techniques from several perspectives and abstraction levels and offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures. •Describes the most important design techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in networks-on-chip based architectures; •Applies state-of-the-art, low-power design techniques to the design of Networks-on-Chip, to demonstrate methodology for design of high-speed, low-power interconnect; •Offers a single source reference to the latest research, otherwise available only in disparate journals and conference proceedings.
650 0 _aEngineering.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
700 1 _aLajolo, Marcello.
_eeditor.
700 1 _aPalermo, Gianluca.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781441969101
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4419-6911-8
912 _aZDB-2-ENG
999 _c105656
_d105656