| 000 | 03115nam a22004815i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4614-3058-2 | ||
| 003 | DE-He213 | ||
| 005 | 20140220083246.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 120423s2012 xxu| s |||| 0|eng d | ||
| 020 |
_a9781461430582 _9978-1-4614-3058-2 |
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| 024 | 7 |
_a10.1007/978-1-4614-3058-2 _2doi |
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| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aGaillardon, Pierre-Emmanuel. _eauthor. |
|
| 245 | 1 | 0 |
_aDisruptive Logic Architectures and Technologies _h[electronic resource] : _bFrom Device to System Level / _cby Pierre-Emmanuel Gaillardon, Ian O’Connor, Fabien Clermidy. |
| 264 | 1 |
_aNew York, NY : _bSpringer New York, _c2012. |
|
| 300 |
_aXIII, 187p. 112 illus. _bonline resource. |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
||
| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_atext file _bPDF _2rda |
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| 505 | 0 | _aIntroduction -- Part I: Background -- Background and Motivation -- Part II: Incremental Logic and Design -- Innovative Structures for Routing and Configuration -- Architectural Impact of 3-D Configuration and Routing Schemes -- Part III: Disruptive Logic Design -- Disruptive Logic Blocks -- Disruptive Architectural Proposals and Performance Analysis -- Conclusions and Contributions. | |
| 520 | _aThis book discusses the opportunities offered by disruptive technologies to overcome the economical and physical limits currently faced by the electronics industry. It provides a new methodology for the fast evaluation of an emerging technology from an architectural perspective and discusses the implications from simple circuits to complex architectures. Several technologies are discussed, ranging from 3-D integration of devices (Phase Change Memories, Monolithic 3-D, Vertical NanoWires-based transistors) to dense 2-D arrangements (Double-Gate Carbon Nanotubes, Sublithographic Nanowires, Lithographic Crossbar arrangements). Novel architectural organizations, as well as the associated tools, are presented in order to explore this freshly opened design space. Describes a novel architectural organization for future reconfigurable systems; Includes a complete benchmarking toolflow for emerging technologies; Generalizes the description of reconfigurable circuits in terms of hierarchical levels; Assesses disruptive logic blocks, using functionality-increased and density-increased devices. | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aComputer science. | |
| 650 | 0 | _aElectronics. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | _aProcessor Architectures. |
| 700 | 1 |
_aO’Connor, Ian. _eauthor. |
|
| 700 | 1 |
_aClermidy, Fabien. _eauthor. |
|
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9781461430575 |
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-3058-2 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c101294 _d101294 |
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