000 03943nam a22005055i 4500
001 978-1-4614-1427-8
003 DE-He213
005 20140220083242.0
007 cr nn 008mamaa
008 111201s2012 xxu| s |||| 0|eng d
020 _a9781461414278
_9978-1-4614-1427-8
024 7 _a10.1007/978-1-4614-1427-8
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aKaźmierski, Tom J.
_eeditor.
245 1 0 _aSystem Specification and Design Languages
_h[electronic resource] :
_bSelected Contributions from FDL 2010 /
_cedited by Tom J. Kaźmierski, Adam Morawiec.
250 _a1.
264 1 _aNew York, NY :
_bSpringer New York,
_c2012.
300 _aXII, 254p. 127 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Electrical Engineering,
_x1876-1100 ;
_v106
505 0 _aFormal Hardware/Software Co-verification of Application Specific Instruction Set Processors -- Evaluating Debugging Algorithms from a Qualitative Perspective -- Mapping of Concurrent Object-oriented Models to Extend Real-time Task Networks -- SystemC-A Modelling of Mixed-technology Systems with Distributed Behaviour -- A Framework for Interactive Refinement of Mixed HW/SW/Analog Systems -- Bottom-up Verification for CMOS Photonic Linear Heterogeneous System -- Towards Abstract Analysis Techniques for Range Based System Simulations -- Modeling Time-triggered Architecture Based Real-time Systems Using SystemC -- Towards the Development of a Set of Transaction Level Models - A Feature-oriented Approach -- Rapid Prototyping of Complex HW/SW Systems Using a Timing and Power Aware ESL Framework -- Towards Accurate Source-level Annotation of Low-level Properties Obtained from Optimized Binary Code -- Architecture Specifications in CλaSH -- SyReC: A Programming Language for Synthesis of Reversible Circuits -- Logical Time @ Work: Capturing Data Dependencies and Platform Constraints -- Formal Support for Untimed MARTE-SystemC Interoperability.
520 _aThis book brings together a selection of the best papers from the thirteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in Southampton, UK in September 2010.  FDL is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers design verification, automatic synthesis and mechanized debug aids; Includes language-based modeling and design techniques for embedded systems; Covers design, modeling and verification of mixed physical domain and mixed signal systems that include significant analog parts in electrical and non-electrical domains; Includes formal and semi-formal system level design methods for complex embedded systems based on the Unified Modelling Language (UML) and Model Driven Engineering (MDE).                
650 0 _aEngineering.
650 0 _aComputer science.
650 0 _aElectronics.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
650 2 4 _aProcessor Architectures.
700 1 _aMorawiec, Adam.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781461414261
830 0 _aLecture Notes in Electrical Engineering,
_x1876-1100 ;
_v106
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4614-1427-8
912 _aZDB-2-ENG
999 _c101065
_d101065