000 03738nam a22004575i 4500
001 978-1-4614-0791-1
003 DE-He213
005 20140220083240.0
007 cr nn 008mamaa
008 110922s2012 xxu| s |||| 0|eng d
020 _a9781461407911
_9978-1-4614-0791-1
024 7 _a10.1007/978-1-4614-0791-1
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aCota, Érika.
_eauthor.
245 1 0 _aReliability, Availability and Serviceability of Networks-on-Chip
_h[electronic resource] /
_cby Érika Cota, Alexandre Morais Amory, Marcelo Soares Lubaszewski.
264 1 _aBoston, MA :
_bSpringer US,
_c2012.
300 _aXIII, 209p. 103 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aIntroduction -- NoC Basics -- Systems-on-Chip Testing -- NoC Reuse for SoC Modular Testing -- Advanced Approaches for NoC Reuse -- Test and Diagnosis of Routers -- Test and Diagnosis of Communication Channels -- Error Control Coding and Retransmission -- Error Location and Reconfiguration -- Concluding Remarks.
520 _aThis book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems.  It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.   This book first presents the characteristics of the NoC design (topologies, structures, routers, wrappers, and protocols), as well as a summary of the terms used in the field and an overview of the existing industrial and academic NoCs. Secondly, the main aspects of the test of a NoC-based system are discussed, starting with the test of the embedded cores where the NoC plays an important role. Current test strategies are presented, such as the reuse of the network for core testing, test scheduling for the NoC reuse, test access methods and interface, efficient reuse of the network, and power-aware and thermal aware NoC-based SoC testing. Then, the challenges and solutions for the NoC infrastructure (interconnects, routers, and network interface) test and diagnosis are presented. Finally, fault tolerance techniques for the NoC are discussed, including techniques based on error control coding, retransmission, fault location, and system reconfiguration. Provides state-of-the-art research on the challenges to test, diagnose and tolerate faults in NoC-based systems; Includes numerous, current test strategies, including re-use of the network for core testing, test scheduling for the NoC reuse, test access methods and interface, efficient re-use of the network, and power-aware and thermal-aware NoC-based SoC testing;  Offers a single source reference to the latest research, otherwise available only in disparate journals and conference proceedings.          
650 0 _aEngineering.
650 0 _aComputer aided design.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aComputer-Aided Engineering (CAD, CAE) and Design.
700 1 _aMorais Amory, Alexandre.
_eauthor.
700 1 _aSoares Lubaszewski, Marcelo.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781461407904
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4614-0791-1
912 _aZDB-2-ENG
999 _c100926
_d100926