000 03724nam a22004695i 4500
001 978-1-4614-0397-5
003 DE-He213
005 20140220083238.0
007 cr nn 008mamaa
008 111007s2012 xxu| s |||| 0|eng d
020 _a9781461403975
_9978-1-4614-0397-5
024 7 _a10.1007/978-1-4614-0397-5
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aArora, Mohit.
_eauthor.
245 1 4 _aThe Art of Hardware Architecture
_h[electronic resource] :
_bDesign Methods and Techniques for Digital Circuits /
_cby Mohit Arora.
250 _a1.
264 1 _aNew York, NY :
_bSpringer New York,
_c2012.
300 _aXV, 221 p. 205 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aThe World of Metastability -- Clocks and Reset -- Handling Multiple Clocks -- Clock Dividers -- Low Power Design -- The Art of Pipelining -- Handling Endianess -- Debouncing Techniques -- Design Guidelines for EMC Performance -- References.
520 _aThis book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.� Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.�� Describes techniques to help IP designers get it right the first time, creating designs optimized in terms of power, area and performance; Focuses on practical aspects of chip design and minimizes theory; Covers chip design in a consistent way, starting with basics and gradually developing advanced concepts, such as electromagnetic compatibility (EMC) design techniques and low-power design techniques such as dynamic voltage and frequency scaling (DVFS). Mohit Arora is a Senior Systems Engineer with Freescale Semiconductor. Since joining Freescale in 2005, his responsibilities have included developing systems and architecture requirements and leading the development of VoIP-based SOCs, as well as generic microcontroller SOCs.  As a systems engineer, he has been involved in product definition and writing specification, working on MCU/MPU-based products for the mid-high-end industrial and consumer market space. Prior to joining Freescale, he worked for Agilent Technologies, ST Microelectronics and DCM Technologies as a design engineer and lead, focused on printing ASICs, USB2.0 PHY, PCI-Express, Infiniband and Serial ATA protocols.   He earned a Bachelor's degree in Electronics and Communication Engineering from Netaji Subhas Institute of Technology (NSIT), India in 2000, has more than 30 publications in international magazine and holds a patent on serial links.
650 0 _aEngineering.
650 0 _aComputer science.
650 0 _aElectronics.
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
650 2 4 _aProcessor Architectures.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781461403968
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4614-0397-5
912 _aZDB-2-ENG
999 _c100842
_d100842