| 000 | 02842nam a22004695i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4614-0131-5 | ||
| 003 | DE-He213 | ||
| 005 | 20140220083238.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 111130s2012 xxu| s |||| 0|eng d | ||
| 020 |
_a9781461401315 _9978-1-4614-0131-5 |
||
| 024 | 7 |
_a10.1007/978-1-4614-0131-5 _2doi |
|
| 050 | 4 | _aTK7888.4 | |
| 072 | 7 |
_aTJFC _2bicssc |
|
| 072 | 7 |
_aTEC008010 _2bisacsh |
|
| 082 | 0 | 4 |
_a621.3815 _223 |
| 100 | 1 |
_aNigussie, Ethiopia Enideg. _eauthor. |
|
| 245 | 1 | 0 |
_aVariation Tolerant On-Chip Interconnects _h[electronic resource] / _cby Ethiopia Enideg Nigussie. |
| 264 | 1 |
_aNew York, NY : _bSpringer New York, _c2012. |
|
| 300 |
_aXI, 170p. 116 illus. _bonline resource. |
||
| 336 |
_atext _btxt _2rdacontent |
||
| 337 |
_acomputer _bc _2rdamedia |
||
| 338 |
_aonline resource _bcr _2rdacarrier |
||
| 347 |
_atext file _bPDF _2rda |
||
| 490 | 1 | _aAnalog Circuits and Signal Processing | |
| 505 | 0 | _aIntroduction -- On-Chip Communication -- Interconnect Design Techniques -- Design of Delay-Insensitive Current Sensing Interconnects -- Enhancing Completion Detection Performance -- Energy Efficient Semi-Serial Interconnect -- Comparison of the Designed Interconnects -- Circuit Techniques for PVT Variation Tolerance. | |
| 520 | _aThis book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance. | ||
| 650 | 0 | _aEngineering. | |
| 650 | 0 | _aElectronics. | |
| 650 | 0 | _aSystems engineering. | |
| 650 | 1 | 4 | _aEngineering. |
| 650 | 2 | 4 | _aCircuits and Systems. |
| 650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | _aNanotechnology and Microengineering. |
| 710 | 2 | _aSpringerLink (Online service) | |
| 773 | 0 | _tSpringer eBooks | |
| 776 | 0 | 8 |
_iPrinted edition: _z9781461401308 |
| 830 | 0 | _aAnalog Circuits and Signal Processing | |
| 856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-0131-5 |
| 912 | _aZDB-2-ENG | ||
| 999 |
_c100807 _d100807 |
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