000			03524nam a22004695i 4500
001			978-1-4419-8297-1
003			DE-He213
005			20140220083233.0
007			cr nn 008mamaa
008			110907s2012 xxu| s |||| 0|eng d
020			_a9781441982971 _9978-1-4419-8297-1
024	7		_a10.1007/978-1-4419-8297-1 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aTehranipoor, Mohammad. _eauthor.
245	1	0	_aTest and Diagnosis for Small-Delay Defects _h[electronic resource] / _cby Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty.
264		1	_aNew York, NY : _bSpringer New York, _c2012.
300			_aXVI, 212p. 114 illus. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction to VLSI Testing -- Delay Test and System-Delay Defects -- Long Path-Based Hybrid Method -- Process Variations- and Crosstalk-Aware Pattern Selection -- Power Supply Noise- and Crosstalk-Aware Hybrid Method -- SDD-Based Hybrid Method -- Maximizing Crosstalk Effect on Critical Paths -- Maximizing Power Supply Noise on Critical Paths -- Faster-than-at-speed Test -- Introduction to Diagnosis -- Diagnosing Noise-Induced SDDs by Using Dynamic SDF. .
520			_aThis book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise. This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations,power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is caused by PSN, crosstalk, or a combination of these two effects. * Provides an introduction to VLSI testing and diagnosis, with a focus on delay testing and small-delay defects; * Presents the most effective techniques for screening small-delay defects, such as long path-based, slack-based, critical fault-based, and noise-aware methodologies; * Shows readers to use timing information for small-delay defect diagnosis, in order to increase the resolution of their current diagnosis flow.
650		0	_aEngineering.
650		0	_aOperating systems (Computers).
650		0	_aSystems engineering.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aPerformance and Reliability.
650	2	4	_aNanotechnology and Microengineering.
700	1		_aPeng, Ke. _eauthor.
700	1		_aChakrabarty, Krishnendu. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9781441982964
856	4	0	_uhttp://dx.doi.org/10.1007/978-1-4419-8297-1
912			_aZDB-2-ENG
999			_c100558 _d100558