000 04239nam a22004695i 4500
001 978-1-4419-8207-0
003 DE-He213
005 20140220083233.0
007 cr nn 008mamaa
008 110907s2012 xxu| s |||| 0|eng d
020 _a9781441982070
_9978-1-4419-8207-0
024 7 _a10.1007/978-1-4419-8207-0
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aAkesson, Benny.
_eauthor.
245 1 0 _aMemory Controllers for Real-Time Embedded Systems
_h[electronic resource] :
_bPredictable and Composable Real-Time Systems /
_cby Benny Akesson, Kees Goossens.
264 1 _aNew York, NY :
_bSpringer New York :
_bImprint: Springer,
_c2012.
300 _aXXII, 222 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aEmbedded Systems,
_x2193-0155 ;
_v2
505 0 _aIntroduction -- Proposed Solution -- SDRAM Memories and Controllers -- Predictable SDRAM Back-End -- Resource Arbitration -- Composable Resource Front-End -- Configuration -- Related Work -- Conclusions and Future Work -- Appendix: System XML Specification.
520 _a  Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation.  This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system. This book is generally intended for readers interested in Systems-on-Chips with real-time applications.   It is especially well-suited for readers looking to use SDRAM memories in systems with hard or firm real-time requirements. There is a strong focus on real-time concepts, such as predictability and composability, as well as a brief discussion about memory controller architectures for high-performance computing. Readers will learn step-by-step how to go from an unpredictable SDRAM memory, offering highly variable bandwidth and latency, to a predictable and composable shared memory, providing guaranteed bandwidth and latency to isolated applications. This journey covers concepts for making memories and arbiters behave in a predictable and composable manner, as well as architecture descriptions of hardware blocks that implement the concepts. Provides an overview of trends in embedded system design that make design of real-time SoCs difficult, error-prone, and expensive; Introduces the concept of predictability, which is required for formal verification of real-time systems; Introduces the concept of composability, which is a divide and conquer technique that enables performance verification per application, instead of monolithic verification for all applications together; Describes a novel approach to composability, which applies to any predictable shared resource, thus widely extending the scope of composable platforms. This is the first approach that can efficiently support SDRAM, which is an essential system component; Provides an overview of the SDRAM architecture at a level that is relevant for system designers, not memory designers, and explains why SDRAM architectures are difficult to use in real-time systems; Describes concepts, architectures, implementation and worst-case performance analysis of predictable SDRAM accesses, as well as predictable and composable memory arbitration, which can be applied to all memory types
650 0 _aEngineering.
650 0 _aMemory management (Computer science).
650 0 _aSystems engineering.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aMemory Structures.
700 1 _aGoossens, Kees.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9781441982063
830 0 _aEmbedded Systems,
_x2193-0155 ;
_v2
856 4 0 _uhttp://dx.doi.org/10.1007/978-1-4419-8207-0
912 _aZDB-2-ENG
999 _c100556
_d100556