Electronic System Level Design An Open-Source Approach - Rigo, Sandro; Azevedo, Rodolfo; Santos, Luiz.; SpringerLink (Online service) (Dordrecht : Springer Netherlands, 2011)
This book intends to provide grounds for further research on electronic system level design (ESL), by means of open-source artifacts and tools, thereby stimulating the unconstrained deployment of new concepts, tools, and methodologies. It devises ESL design from the pragmatic perspective of a SystemC-based representation, by showing how to build and how to use ESL languages, models and tools. This work is based on the successful experience acquired with the conception of the architecture description language (ADL) ArchC, the development of its underlying tool suite, and the building of its platform modeling infrastructure. With more than 10,000 accesses per year since 2004, the dissemination of ArchC models has reached not only students in need of proper infrastructure to develop their research projects, but also commercial designers in need of processor models to build virtual platforms using SystemC. The need to anticipate the development of hardware-dependent software and to build virtual prototypes gave rise to transaction level modeling (TLM). Since SystemC provided the elements and the adequate abstraction level for supporting TLM, their relation has grown so strong that OSCI created a TLM Working Group whose effort resulted in the TLM 2.0 standard, which is also covered in this book. Employs open-source infrastructure Includes TLM 2.0 Addresses power modeling Includes step-by-step examples
Part I System Design Representation -- Electronic System Level Design -- Open-Source Languages -- Transaction Level Modeling -- Part II Open-Source Models and Tools -- ArchC Model Design Handbook -- Building Platform Models with SystemC -- Retargetable Binary Tools -- Part III Advanced Topics -- Debugging SystemC Platform Models -- SystemC-based Power Evaluation with PowerSC.
Keywords: Engineering; Computer science; Systems engineering; Engineering; Circuits and Systems; Register-Transfer-Level Implementation