Library Services | Technical University of Kenya

Your cart is empty.
Normal view MARC view ISBD view

Embedded Memory Design for Multi-Core and Systems on Chip [electronic resource] / by Baker Mohammad.

By: Mohammad, Baker [author.].
Contributor(s): SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Analog Circuits and Signal Processing: 116Publisher: New York, NY : Springer New York : Imprint: Springer, 2014Description: XIII, 95 p. 63 illus., 37 illus. in color. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9781461488811.Subject(s): Engineering | Computer science | Electronics | Systems engineering | Engineering | Circuits and Systems | Electronics and Microelectronics, Instrumentation | Processor ArchitecturesDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges.
In: Springer eBooksSummary: This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.  ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices; ·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; ·         Includes detailed discussion of memory hierarchy and its impact on energy and performance; ·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.
Tags from this library: No tags from this library for this title. Log in to add tags.
No physical items for this record

Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges.

This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.  ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices; ·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; ·         Includes detailed discussion of memory hierarchy and its impact on energy and performance; ·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.

There are no comments for this item.

Log in to your account to post a comment.

2017 | The Technical University of Kenya Library | +254(020) 2219929, 3341639, 3343672 | library@tukenya.ac.ke | Haile Selassie Avenue