VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design (Record no. 98845)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03844nam a22005415i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-642-45073-0 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140220082923.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 131126s2013 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783642450730 |
| -- | 978-3-642-45073-0 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-3-642-45073-0 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | QA76.9.A73 |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | QA76.9.S88 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | UYD |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | COM032000 |
| Source | bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | COM067000 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 003.3 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Burg, Andreas. |
| Relator term | editor. |
| 245 10 - TITLE STATEMENT | |
| Title | VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design |
| Medium | [electronic resource] : |
| Remainder of title | 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers / |
| Statement of responsibility, etc | edited by Andreas Burg, Ayṣe Coṣkun, Matthew Guthaus, Srinivas Katkoori, Ricardo Reis. |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| -- | 2013. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | X, 235 p. 121 illus. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | IFIP Advances in Information and Communication Technology, |
| International Standard Serial Number | 1868-4238 ; |
| Volume number/sequential designation | 418 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | FPGA-Based High-Speed Authenticated Encryption System -- A Smart Memory Accelerated Computed Tomography Parallel Backprojection -- Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure -- Spatially-Varying Image Warping: Evaluations and VLSI Implementations -- An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing -- Configurable Low-Latency Interconnect for Multi-core Clusters -- A Hexagonal Processor and Interconnect Topology for Many-Core Architecture with Dense On-Chip Networks -- Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections -- On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture -- CMOS Implementation of Threshold Gates with Hysteresis -- Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book contains extended and revised versions of the best papers presented at the 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, held in Santa Cruz, CA, USA, in October 2012. The 12 papers included in the book were carefully reviewed and selected from the 33 full papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of these systems. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer hardware. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer network architectures. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer System Implementation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Hardware. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Systems Organization and Communication Networks. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Coṣkun, Ayṣe. |
| Relator term | editor. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Guthaus, Matthew. |
| Relator term | editor. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Katkoori, Srinivas. |
| Relator term | editor. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Reis, Ricardo. |
| Relator term | editor. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783642450723 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | IFIP Advances in Information and Communication Technology, |
| -- | 1868-4238 ; |
| Volume number/sequential designation | 418 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-642-45073-0 |
| 912 ## - | |
| -- | ZDB-2-SCS |
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