Routing Algorithms in Networks-on-Chip (Record no. 92141)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03517nam a22004695i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-1-4614-8274-1 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140220082501.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 131022s2014 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781461482741 |
| -- | 978-1-4614-8274-1 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-1-4614-8274-1 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Palesi, Maurizio. |
| Relator term | editor. |
| 245 10 - TITLE STATEMENT | |
| Title | Routing Algorithms in Networks-on-Chip |
| Medium | [electronic resource] / |
| Statement of responsibility, etc | edited by Maurizio Palesi, Masoud Daneshtalab. |
| 264 #1 - | |
| -- | New York, NY : |
| -- | Springer New York : |
| -- | Imprint: Springer, |
| -- | 2014. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XIV, 410 p. 219 illus., 97 illus. in color. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Part I Performance Improvement -- Basic Concepts on On-Chip Networks -- A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs -- Run-Time Deadlock Detection -- The Abacus Turn Model -- Learning-based Routing Algorithms for on-Chip Networks -- Part II Multicast Communication -- Efficient and Deadlock-Free Tree-based Multicast Routing Method for Network-on-Chip -- Path-based Multicast Routing for 2D and 3D Mesh Networks -- Part III Fault Tolerance and Reliability -- Fault-Tolerant Routing Algorithms in Networks-on-Chip -- Reliable and Adaptive Algorithms for 2D and 3D Networks-on-Chip. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation. Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability. · Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; · Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation; · Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics and Microelectronics, Instrumentation. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Daneshtalab, Masoud. |
| Relator term | editor. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9781461482734 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-1-4614-8274-1 |
| 912 ## - | |
| -- | ZDB-2-ENG |
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