Emerging Memory Technologies (Record no. 91813)

000 -LEADER
fixed length control field 03386nam a22004575i 4500
001 - CONTROL NUMBER
control field 978-1-4419-9551-3
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220082454.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
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008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 131021s2014 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441995513
-- 978-1-4419-9551-3
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-1-4419-9551-3
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Xie, Yuan.
Relator term editor.
245 10 - TITLE STATEMENT
Title Emerging Memory Technologies
Medium [electronic resource] :
Remainder of title Design, Architecture, and Applications /
Statement of responsibility, etc edited by Yuan Xie.
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2014.
300 ## - PHYSICAL DESCRIPTION
Extent VI, 322 p. 219 illus., 137 illus. in color.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory -- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement -- Energy-Efficient Systems Using Resistive Memory Devices -- Asymmetric in STT-RAM Cell Operations -- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs -- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices -- Resistive Memories in Associative Computing -- Weal Leveling Techniques for Non-Volatile Memories -- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies -- Ferroelectric Nonvolatile Processor Design, Optimization and Application.
520 ## - SUMMARY, ETC.
Summary, etc This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits. • Provides a comprehensive reference on designing modern circuits with emerging, non-volatile memory technologies, such as MRAM and PCRAM; • Explores new design opportunities offered by emerging memory technologies, from a holistic perspective; • Describes topics in technology, modeling, architecture and applications; • Enables circuit designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future computing systems. 
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronics.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronics and Microelectronics, Instrumentation.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441995506
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-9551-3
912 ## -
-- ZDB-2-ENG

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