Multi-objective Design Space Exploration of Multiprocessor SoC Architectures (Record no. 106016)

000 -LEADER
fixed length control field 04392nam a22004695i 4500
001 - CONTROL NUMBER
control field 978-1-4419-8837-9
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083728.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
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008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 110823s2011 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441988379
-- 978-1-4419-8837-9
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-1-4419-8837-9
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Silvano, Cristina.
Relator term editor.
245 10 - TITLE STATEMENT
Title Multi-objective Design Space Exploration of Multiprocessor SoC Architectures
Medium [electronic resource] :
Remainder of title The MULTICUBE Approach /
Statement of responsibility, etc edited by Cristina Silvano, William Fornaciari, Eugenio Villar.
250 ## - EDITION STATEMENT
Edition statement 1.
264 #1 -
-- New York, NY :
-- Springer New York,
-- 2011.
300 ## - PHYSICAL DESCRIPTION
Extent XVIII, 222p. 88 illus.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
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-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Part I: Methodologies and Tools -- 1. The MULTICUBE Design Flow -- 2. M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration -- 3. Optimization Algorithms for Design Space Exploration of Embedded Systems -- 4. Response Surface Modeling for Design Space Exploration of Embedded System --  5. Design Space Exploration Supporting Run-Time Resource Management -- 6. Run-Time Resource Management at the Operating System Level -- Part II: Application Domains -- 7. High-level Modeling and Exploration of a Powerline Communication Network Based on System-on-Chip -- 8. Design Space Exploration of Parallel Architectures -- 9. Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming.
520 ## - SUMMARY, ETC.
Summary, etc This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives.  The MULTICUBE project (an EU Seventh Framework Programme project) has focused on this problem for the past three years and is the basis for this book.  It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc.  This book focuses on the design of complex applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.  The methodologies presented have been applied to several application domains to demonstrate their applicability and benefits. First, a high-level modeling and exploration approach has been applied for a powerline communication network based on a SoC, then the application of the automatic DSE flow to parallel on-chip architectures is discussed, and finally the DSE for run-time management has been applied to a reconfigurable system for video streaming. Describes the MULTICUBE Design Space Exploration methodology, which provides a multi-level system specification and modeling framework to provide static and dynamic evaluation of the system-level metrics; Provides a common tool interface composed of several layers that are connected through standardized interfaces; Offers a short path to real design space exploration, through use of industrial design flows for examples and tools; Includes optimizations in areas such as multi-processor architectures, multimedia, power consumption, design time, system-level simulation and profiling, run-time management of resources, etc.  
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer-Aided Engineering (CAD, CAE) and Design.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Fornaciari, William.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Villar, Eugenio.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441988362
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-8837-9
912 ## -
-- ZDB-2-ENG

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