Memory-Based Logic Synthesis (Record no. 105930)

000 -LEADER
fixed length control field 02854nam a22004335i 4500
001 - CONTROL NUMBER
control field 978-1-4419-8104-2
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083726.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 110228s2011 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441981042
-- 978-1-4419-8104-2
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-1-4419-8104-2
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number QC71.82-73.8
072 #7 - SUBJECT CATEGORY CODE
Subject category code TH
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC031000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.042
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Sasao, Tsutomu.
Relator term author.
245 10 - TITLE STATEMENT
Title Memory-Based Logic Synthesis
Medium [electronic resource] /
Statement of responsibility, etc by Tsutomu Sasao.
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2011.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 189p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- Basic Elements -- Definitions and Basic Properties -- MUX-Based Synthesis -- Cascade-Based Synthesis -- Encoding Method -- Functions with Small C-Measures -- C-Measure of Sparse Functions -- Index Generation Functions -- Hash-Based Synthesis -- Reduction of the Number of Variables -- Various Realizations -- Conclusions.
520 ## - SUMMARY, ETC.
Summary, etc This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories.  This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.  Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.  Describes in detail the synthesis of logic functions using memories;  Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis;  Shows logic design methods for index generation functions;  Introduces C-measure, which specifies the complexity of Boolean functions;  Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.  
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Energy.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Energy, general.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer-Aided Engineering (CAD, CAE) and Design.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441981035
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-8104-2
912 ## -
-- ZDB-2-ENG

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