Reliability of Nanoscale Circuits and Systems (Record no. 105588)

000 -LEADER
fixed length control field 03821nam a22004815i 4500
001 - CONTROL NUMBER
control field 978-1-4419-6217-1
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083720.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 101029s2011 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441962171
-- 978-1-4419-6217-1
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-1-4419-6217-1
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Stanisavljević, Miloš.
Relator term author.
245 10 - TITLE STATEMENT
Title Reliability of Nanoscale Circuits and Systems
Medium [electronic resource] :
Remainder of title Methodologies and Circuit Architectures /
Statement of responsibility, etc by Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici.
264 #1 -
-- New York, NY :
-- Springer New York,
-- 2011.
300 ## - PHYSICAL DESCRIPTION
Extent XXVII, 195p. 86 illus., 55 illus. in color.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
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-- rdamedia
338 ## -
-- online resource
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-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- Reliability, Faults and Fault Models -- Nanotechnology and Nanodevices -- Fault-Tolerant Architectures and Approaches -- Reliability Evaluation Techniques -- Averaging Design Implementations -- Statistical Evaluation of Fault-Tolerance Using Proability Density Functions -- System Level Reliability Evaluation and Optimization -- Summary and Conclusions -- References.
520 ## - SUMMARY, ETC.
Summary, etc Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures Milos Stanisavljevic Alexandre Schmid Yusuf Leblebici Future integrated circuits are expected to be made of emerging nanodevices and their associated interconnects, but the reliability of such components is a major threat to the design of future integrated computing systems. Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures confronts that challenge. The first part discusses the state-of-the-art of the circuits and systems as well as the architectures and methodologies focusing the enhancement of the reliability of digital integrated circuits. It proposes circuit and system level solutions to overcome high defect density and presents reliability, fault models and fault tolerance. It includes an overview of nano-technologies that are considered in the fabrication of future integrated circuits and covers solutions provided in the early ages of CMOs as well as recent techniques. The second part of the text analyzes original circuit and system level solutions. It details an architecture suitable for circuit-level and gate-level redundant modules implementation and exhibiting significant immunity to permanent and random failures as well as unwanted fluctuation and the fabrication parameters. It also proposes a novel general method enabling the introduction of fault-tolerance and evaluation of the circuit and architecture reliability. And the third part proposes a new methodology that introduces reliability in existing design flows. That methodology consists of partitioning the full system to design into reliability optimal partitions and applying reliability evaluation and optimization at local and system level.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer aided design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System safety.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Quality Control, Reliability, Safety and Risk.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer-Aided Engineering (CAD, CAE) and Design.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Schmid, Alexandre.
Relator term author.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Leblebici, Yusuf.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441962164
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-6217-1
912 ## -
-- ZDB-2-ENG

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