Adiabatic Logic (Record no. 104453)

000 -LEADER
fixed length control field 04147nam a22005055i 4500
001 - CONTROL NUMBER
control field 978-94-007-2345-0
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083341.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 111028s2012 ne | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9789400723450
-- 978-94-007-2345-0
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-94-007-2345-0
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7867-7867.5
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFD5
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Teichmann, Philip.
Relator term author.
245 10 - TITLE STATEMENT
Title Adiabatic Logic
Medium [electronic resource] :
Remainder of title Future Trend and System Level Perspective /
Statement of responsibility, etc by Philip Teichmann.
264 #1 -
-- Dordrecht :
-- Springer Netherlands,
-- 2012.
300 ## - PHYSICAL DESCRIPTION
Extent XVIII, 166 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
490 1# - SERIES STATEMENT
Series statement Springer Series in Advanced Microelectronics,
International Standard Serial Number 1437-0387 ;
Volume number/sequential designation 34
520 ## - SUMMARY, ETC.
Summary, etc Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the power-clock is by means of the synchronous 2N2P LC oscillator, which is also robust with respect to pattern-induced capacitive variations. An easy to implement but powerful power-clock gating supplement is proposed by gating the synchronization signals. Diverse implementations to shut down the system are presented and rated for their applicability and other aspects like energy reduction capability and data retention. Advantageous usage of adiabatic logic requires compact and efficient arithmetic structures. A broad variety of adder structures and a Coordinate Rotation Digital Computer are compared and rated according to energy consumption and area usage, and the resulting energy saving potential against static CMOS proves the ultra-low-power capability of adiabatic logic. In the end, a new circuit topology has to compete with static CMOS also in productivity. On a 130nm test chip, a large scale test vehicle containing an FIR filter was implemented in adiabatic logic, utilizing a standard, library-based design flow, fabricated, measured and compared to simulations of a static CMOS counterpart, with measured saving factors compliant to the values gained by simulation. This leads to the conclusion that adiabatic logic is ready for productive design due to compatibility not only to CMOS technology, but also to electronic design automation (EDA) tools developed for static CMOS system design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Physics.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronics.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Physics.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic Circuits and Devices.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic Design.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronics and Microelectronics, Instrumentation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Energy Efficiency (incl. Buildings).
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9789400723443
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Springer Series in Advanced Microelectronics,
-- 1437-0387 ;
Volume number/sequential designation 34
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-94-007-2345-0
912 ## -
-- ZDB-2-ENG

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