Hardware/Software Co-design for Heterogeneous Multi-core Platforms (Record no. 104296)

000 -LEADER
fixed length control field 03704nam a22004335i 4500
001 - CONTROL NUMBER
control field 978-94-007-1406-9
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140220083338.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 111104s2012 ne | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9789400714069
-- 978-94-007-1406-9
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-94-007-1406-9
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.4
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Bertels, Koen.
Relator term editor.
245 10 - TITLE STATEMENT
Title Hardware/Software Co-design for Heterogeneous Multi-core Platforms
Medium [electronic resource] :
Remainder of title The hArtes Toolchain /
Statement of responsibility, etc edited by Koen Bertels.
264 #1 -
-- Dordrecht :
-- Springer Netherlands :
-- Imprint: Springer,
-- 2012.
300 ## - PHYSICAL DESCRIPTION
Extent XXII, 234 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- ThArtes Toolchain -- The hArtes Platform -- Audio Array Processing for Telepresence -- In Car Audio -- Extensions of the hArtes Toolchain -- Conclusion: Multi-Core Processor Architectures are Here to Stay.
520 ## - SUMMARY, ETC.
Summary, etc This book describes the results and outcome of the FP6 project, known as hArtes, which focuses on the development of an integrated tool chain targeting a heterogeneous multi core platform comprising of a general purpose processor (ARM or powerPC), a DSP (the diopsis) and an FPGA. The tool chain takes existing source code and proposes transformations and mappings such that legacy code can easily be ported to a modern, multi-core platform. Benefits of the hArtes approach, described in this book, include: Uses a familiar programming paradigm: hArtes proposes a familiar programming paradigm which is compatible with the widely used programming practice, irrespective of the target platform. Enables users to view multiple cores as a single processor: the hArtes approach abstracts away the heterogeneity as well as the multi-core aspect of the underlying hardware so the developer can view the platform as consisting of a single, general purpose processor. Facilitates easy porting of existing applications: hArtes provides a migration path where either through manual annotation or the use of the tool chain to apply the necessary modifications, one can test on the real platform how the application behaves and, when necessary, repeat the process if the design objective has not been met. Enables development of new applications using powerful toolboxes: the hArtes tool chain provides both high level algorithm exploration tools with subsequent, automatic code generation which can then be fed to other toolboxes in the chain. Employs an open tool chain architecture: any development tool can be integrated in the tool chain, so users are not locked into a single vendor technology. Allows users easily to retarget to new hardware platforms: the same development tools and environments can be used, no matter what hardware platform one targets. Maps from fully automatic to fully manual: developers can choose to opt for a full automatic mapping, semi-automatic or even fully manual. At each step, decisions can be evaluated and overruled if considered inadequate.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Systems engineering.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9789400714052
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-94-007-1406-9
912 ## -
-- ZDB-2-ENG

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