The Art of Hardware Architecture (Record no. 100842)
[ view plain ]
| 000 -LEADER | |
|---|---|
| fixed length control field | 03724nam a22004695i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-1-4614-0397-5 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140220083238.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 111007s2012 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781461403975 |
| -- | 978-1-4614-0397-5 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-1-4614-0397-5 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7888.4 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJFC |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008010 |
| Source | bisacsh |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Edition number | 23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Arora, Mohit. |
| Relator term | author. |
| 245 14 - TITLE STATEMENT | |
| Title | The Art of Hardware Architecture |
| Medium | [electronic resource] : |
| Remainder of title | Design Methods and Techniques for Digital Circuits / |
| Statement of responsibility, etc | by Mohit Arora. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1. |
| 264 #1 - | |
| -- | New York, NY : |
| -- | Springer New York, |
| -- | 2012. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XV, 221 p. 205 illus. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | The World of Metastability -- Clocks and Reset -- Handling Multiple Clocks -- Clock Dividers -- Low Power Design -- The Art of Pipelining -- Handling Endianess -- Debouncing Techniques -- Design Guidelines for EMC Performance -- References. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.� Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.�� Describes techniques to help IP designers get it right the first time, creating designs optimized in terms of power, area and performance; Focuses on practical aspects of chip design and minimizes theory; Covers chip design in a consistent way, starting with basics and gradually developing advanced concepts, such as electromagnetic compatibility (EMC) design techniques and low-power design techniques such as dynamic voltage and frequency scaling (DVFS). Mohit Arora is a Senior Systems Engineer with Freescale Semiconductor. Since joining Freescale in 2005, his responsibilities have included developing systems and architecture requirements and leading the development of VoIP-based SOCs, as well as generic microcontroller SOCs. As a systems engineer, he has been involved in product definition and writing specification, working on MCU/MPU-based products for the mid-high-end industrial and consumer market space. Prior to joining Freescale, he worked for Agilent Technologies, ST Microelectronics and DCM Technologies as a design engineer and lead, focused on printing ASICs, USB2.0 PHY, PCI-Express, Infiniband and Serial ATA protocols. He earned a Bachelor's degree in Electronics and Communication Engineering from Netaji Subhas Institute of Technology (NSIT), India in 2000, has more than 30 publications in international magazine and holds a patent on serial links. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Systems engineering. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics and Microelectronics, Instrumentation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Processor Architectures. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9781461403968 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-1-4614-0397-5 |
| 912 ## - | |
| -- | ZDB-2-ENG |
No items available.