Svensson, Lars.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers / [electronic resource] : edited by Lars Svensson, José Monteiro. - Berlin, Heidelberg : Springer Berlin Heidelberg, 2009. - digital. - Lecture Notes in Computer Science, 5349 0302-9743 ; . - Lecture Notes in Computer Science, 5349 .
9783540959489
10.1007/978-3-540-95948-9 doi
Computer science.
Memory management (Computer science).
Logic design.
Computer system performance.
Systems engineering.
Computer Science.
Logic Design.
Processor Architectures.
System Performance and Evaluation.
Arithmetic and Logic Structures.
Memory Structures.
Circuits and Systems.
QA76.9.L63
621.395
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers / [electronic resource] : edited by Lars Svensson, José Monteiro. - Berlin, Heidelberg : Springer Berlin Heidelberg, 2009. - digital. - Lecture Notes in Computer Science, 5349 0302-9743 ; . - Lecture Notes in Computer Science, 5349 .
9783540959489
10.1007/978-3-540-95948-9 doi
Computer science.
Memory management (Computer science).
Logic design.
Computer system performance.
Systems engineering.
Computer Science.
Logic Design.
Processor Architectures.
System Performance and Evaluation.
Arithmetic and Logic Structures.
Memory Structures.
Circuits and Systems.
QA76.9.L63
621.395