Saxena, Prashant.
Routing Congestion in VLSI Circuits: Estimation and Optimization [electronic resource] / by Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. - Boston, MA : Springer US, 2007. - digital. - Series on Integrated Circuits and Systems, 1558-9412 . - Series on Integrated Circuits and Systems, .
9780387485508
10.1007/0-387-48550-3 doi
Engineering.
Computer aided design.
Telecommunication.
Systems engineering.
Engineering.
Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Communications Engineering, Networks.
TK7888.4
621.3815
Routing Congestion in VLSI Circuits: Estimation and Optimization [electronic resource] / by Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. - Boston, MA : Springer US, 2007. - digital. - Series on Integrated Circuits and Systems, 1558-9412 . - Series on Integrated Circuits and Systems, .
9780387485508
10.1007/0-387-48550-3 doi
Engineering.
Computer aided design.
Telecommunication.
Systems engineering.
Engineering.
Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Communications Engineering, Networks.
TK7888.4
621.3815